This invention relates to a phase control device incorporated in a demodulator of a MODEM. More particularly, this invention relates to a phase control device suitable for incorporation in a demodulator which includes a signal delay time in its path of a demodulated data signal between a demodulation part and a data identification/decision part.
A paper No. 1985 entitled "Carrier Recovery in 9600 bps MODEM" reported in a general meeting of the Institute of Electronics and Communication Engineers of Japan, held in 1981, proposes a phase control device suitable for use in a demodulator of a MODEM so as to improve the stability of a data signal receiving system as well as the capability of phase control. According to the proposed phase control device, a relatively slow phase fluctuation, such as a frequency offset of a carrier of a modulated signal, is removed by a phase control system which cancels such a variation before the modulated signal is applied to an automatic equalizer. On the other hand, a phase fluctuation having a relatively high variable frequency, such as a carrier jitter, is removed by another phase control system which cancels such a variation after the demodulated signal is processed by the automatic equalizer.
Thus, in the prior art phase control device, two phase control systems commonly-connected at part of their own loops are provided so as to improve the stability of the signal receiving system without lowering the capability of suppressing the carrier phase jitter.
However, the structure of the prior art phase control device is such that a phase control loop not including a signal delay part is incorporated in another phase control loop including such a signal delay part. Because of the above structure, these two phase control loops cannot be handled as loops that are independent of each other. Therefore, the overall characteristics of the prior art phase control device differ inevitably from the specifically designed characteristics of the individual phase control loops, and the design for improving the phase control capability must be made while taking into account the signal delay by the signal delay part as well as the interaction between the two phase control loops. Further, the prior art phase control device has such another problem that its design is very difficult because complex signal processing is required so as to achieve the desired stability of the signal receiving system.